发明名称 TESTING METHOD OF DIGITAL CIRCUIT
摘要 PURPOSE:To test the functions of this kind of chip quickly by providing test input terminals on a multiple-function integrated circuit chip. CONSTITUTION:A test input terminal 20 for testing a chip and latches 26 are provided. The latch signals of the latches 26 are set so that the results are latched every time the logic signals of the other latch signals or the original signals of the other signals are received and comparison is performed. In a test mode, the latched results are outputted to digital output ports 38 - 55. At the same time, A/D converted latche signals 27 are outputted to the ports 38 - 55. When, e.g. the performance of an A/D converter is checked, a CPU 1 checks the terminal 20 in resetting. When the terminal 20 is at an L level, a test program is started. The input data are written into latches 21 - 24 and outputted to the ports 38 - 55. The result of the operations of the latches 26 is outputted to the ports 38 - 55 at every comparison. The output values are compared with specified digital values. The pass or fail of the chip function can be judged based on the obtained result.
申请公布号 JPH0267974(A) 申请公布日期 1990.03.07
申请号 JP19880218575 申请日期 1988.09.02
申请人 CANON INC 发明人 ISHIKAWA TADASHI
分类号 G01R31/28;G03G15/00;G03G21/00 主分类号 G01R31/28
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