| 摘要 |
PURPOSE:To improve the precision of distinction between noise and a normal signal by eliminating the noise whose width is shorter than the 16-clock period and quantifying and expressing the capability of distinction between noise and a true synchronizing signal. CONSTITUTION:When an input signal DIN is inverted to the low level at a certain time and a narrow noise by which it is goes to the high level and the low level again within 16 periods of a clock signal CK is inputted, counter circuits 11 and 12 in circuits A and B are reset before counting the clock signal CK 16 times. Consequently, signals XR and XS go to the high level together, and the internal state of an R-S flip flop 13 is not changed, and an output signal QO is kept in the same level, and the narrow noise whose width is longer than one period of the clock signal CK and is shorter than 16 periods is eliminated. Thus, an excellent noise elimination characterstic is obtained. |
