发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To enable an offset section to be large in breadth and to restrain a switching transistor from deteriorating in source-drain breakdown strength by a method wherein impurity is selectively introduced in an oblique direction against a substrate. CONSTITUTION:A gate electrode 9 is built on the gate insulating film of a switching transistor region and a peripheral transistor region. And, a side wall 11 is provided to the side of the gate electrode of the switching transistor region and the peripheral transistor region, and a resist film 5d is formed covering a peripheral transistor region 4b which includes the gate electrode 9 and the side wall 11. Then, As<+> is introduced in an oblique direction against a substrate 1 through, for instance, an As ion implantation method using the resist film 5d as a mask. By this setup, a drain diffusion layer 12a and a source diffusion layer 12b are formed so as to make the width of an offset section 10a on the drain side larger than that of an offset section 10b on the source side. Even if the side wall 11 becomes small in width with the integration, the width of the offset section 10a on the drain side can be larger than that of a conventional one, the source.drain breakdown strength can be prevented from deteriorating, and a phase can be safely cut off.
申请公布号 JPH0265255(A) 申请公布日期 1990.03.05
申请号 JP19880217023 申请日期 1988.08.31
申请人 FUJITSU LTD 发明人 MIZUTANI KAZUHIRO
分类号 H01L21/336;H01L21/265;H01L21/82;H01L21/8234;H01L21/8242;H01L27/088;H01L27/10;H01L27/108;H01L29/78 主分类号 H01L21/336
代理机构 代理人
主权项
地址
您可能感兴趣的专利