| 摘要 |
<p>PURPOSE:To output always synchronized control data without damaging an abnormality detecting function by outputting the operated control data from a data processor to a state signal always the same. CONSTITUTION:When an interruption request IRQ is given, processors 2 and 3 examine the flag states of their own, and when the flags of themselves are set, they examine the flag of each other. Thus, it is decided whether or not new output control data thetaB are determined in both the CPUs 2 and 3. When it is decided that the data thetaB are determined in the CPUs 2 and 3 by the retrieval of the flags, the CPUs 2 and 3 make the data thetaB of their own into output control data theta to be sent. After the flags set in them are cleared, the data thetaare supplied to an AND/OR processing circuit 4. The circuit 4 AND/OR- processes the data theta, gives them to a device 1 to be controlled, supplies them to the CPUs 2 and 3 as an output monitor signal, completes an interruption loop and it is returned to a former main loop.</p> |
