发明名称 AUTOMATIC PHASE SYNCHRONIZING CIRCUIT
摘要 PURPOSE:To simplify the test by inputting a data generated from one simulation test panel to other panel to be tested and taking phase synchronization with reset. CONSTITUTION:A phase of a data from a simulation test panel 3 and a phase of a data from a panel 6 to be tested are compared by a phase matching circuit 4 to match the phase thereby generating a reset pulse coincident with the phase of the panel 6 to be tested. Thus, the test making the phase of the data from the simulation test panel 3 and the panel 6 to be tested is attained by using the reset pulse. Thus, a signal generated from the simulation test panel is inputted to the other panel 6 to be tested and phase synchronization is taken by applying reset so as to simplify the test.
申请公布号 JPH0263234(A) 申请公布日期 1990.03.02
申请号 JP19880216111 申请日期 1988.08.29
申请人 FUJITSU LTD 发明人 HARIGAYA KOICHI;IKUTA KOJI
分类号 H03L7/00;H04L7/00 主分类号 H03L7/00
代理机构 代理人
主权项
地址