发明名称 ARITHMETIC PROCESS SYSTEM BY RE-EXECUTION OF INSTRUCTION
摘要 PURPOSE:To reduce the hardware by executing the operand data via a high- degree pipeline process and controlling a delay type additional executing process vis an instruction re-executing function and chiefly based on a microprogram. CONSTITUTION:When the operand data on a floating point arithmetic instruction to be executed is supplied, a floating point computing element 8 is immediately started without carrying out the pre-process for detection of a delay type additional executing process. While this executing process is detected by a microprogram, for example, in parallel with execution of the element 8. In this case, an arithmetic control part 3 produces an instruction re-executing request interruption to an instruction control part 1. Thus the part 1 cnacels the subsequent instructions and carries out only the instruction that requested an instruction re-executing request instruction.
申请公布号 JPH0262631(A) 申请公布日期 1990.03.02
申请号 JP19880213815 申请日期 1988.08.30
申请人 FUJITSU LTD 发明人 MATSUZAKI SHIGEHARU;UEMOTO SHIGEMI
分类号 G06F9/38;G06F7/00 主分类号 G06F9/38
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