| 摘要 |
1. A charge transfer device comprising N memory elements (10n , 10n+1 ), in which the stored charges are transferred by means of two or four clock signals (h1 ...h4 ) produced by a clock signal generator, the two or four clock signals being applied to each memory element by means of two or four contact pads (p1n , ..., p4n ), at each of which appears a capacitance Ce between adjacent pads and a capacitance Cs between a pad and the substrate (20) of the charge transfer device, characterized in that, in order to increase the speeds of transferring the stored charges, each of the two or four contact pads of a memory element has connected to it one of the ends of two self-induction members LA and LB in such a manner that, the other end of the self-induction member (LB) being loaded by an impedance of the resistive kind Zc, the impedance presented by the other end of the self-induction member LA is also of the resistive kind.
|
