Semiconductor memory device with a circuit for analyzing defects in word-lines

摘要

A semiconductor memory device of the invention includes a memory cell array including a plurality of memory cells, and a row decoder and a column decoder for selecting word-lines and bit-lines, respectively. The semiconductor memory device further includes a plurality of transistors having their gates connected to corresponding word-lines, their sources connected to a fixed potential source, and their drains connected commonly to a predetermined pad.