| 摘要 |
PURPOSE: To optimize a bus utilization rate without transiently increasing system power requests by latching respective data states on a data bus until the next data state is driven on the bus. CONSTITUTION: When the bus 12 is driven to a specified data state by one of driving circuits 22 and 24, a latch circuit 26 latches the data state on the bus 12 until the bus 12 is driven to the different data state by the driving circuit or the different driving circuit. Data latched on the bus 12 are sampled by a reception circuit 28 or one of the driving circuits 22 and 24. When the driving circuit 22 drives the bus 12 to a first data state, the latch circuit 26 maintains the first data state on the bus 12 until the driving circuit 22 or 24 drives the bus 12 to the different data state. |
