发明名称 RECEPTION PATTERN SPEED DETECTING CIRCUIT
摘要 PURPOSE:To receive a specific pattern having any speed of j-kind of speeds and to decide the speed based on the pattern by using one kind of pattern detection circuit and a counter circuit so as to detect the speed of a pattern having j-kind of speeds. CONSTITUTION:A pattern detection circuit 1 sends a pattern detection signal for each input of a pattern, the pattern detection signal is used as a clock signal by a 1st counter circuit 2, which is counted up at each detection of the pattern. When the count exceeds a preset threshold level, a carry signal is outputted. The carry signal is inverted by an inverter circuit 3 and used as a reset signal for a 2nd counter circuit 4. The carry output of the 2nd counter circuit 4 inverts the state of a flip-flop circuit 5, its output selects the speed of a reception pattern by using a selector circuit 6 and the selected clock operates the pattern detection circuit.
申请公布号 JPH0256135(A) 申请公布日期 1990.02.26
申请号 JP19880207503 申请日期 1988.08.22
申请人 NEC CORP 发明人 YOKOSE YOSHIO
分类号 H04L7/08 主分类号 H04L7/08
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