| 摘要 |
PURPOSE:To obtain a high operation speed by using a storage circuit in which an inverse number of a divisor is stored, as a circuit for deriving the inverse number of the divisor. CONSTITUTION:When a divisor and a dividend are given for an operation, the dividend is inputted directly to a multiplier 2a, and the divisor is inputted to a storage circuit 1. In the storage circuit 1, an inverse number 3 of the divisor is read out of an address corresponding to the inputted divisor, and outputted to the multipliers 2a. In the multiplier 2a, the dividend is multiplied by the inverse number 3 of the divisor and a numerical value of the quotient is outputted as a result of division. In such a way, by using the storage circuit 1 in which the inverse number 3 of the divisor is stored in advance, as a circuit for deriving the inverse number 3 of the divisor, all digits of the numerical value can be divided simultaneously, and a higher operation speed than that of a convensional digital multiplication type divider using many gate circuits can be obtained. |
