| 摘要 |
<p>PURPOSE: To quickly change blast signals by recording the byte number of data transferred after address signals, generating a changeable final signal before a ready signal every time the change of a byte size signal is detected and cyclically detecting the byte size signal. CONSTITUTION: For the (n)-byte transfer of the data, this microprocessor supplies the address signals and a first input means 12 receives at least one signal (byte size signal) by the next ready signal. The microprocessor is provided with an output means for supplying the final signal for indicating that it is to be full by data transfer generated by the next ready signal and the microprocessor is provided with a logic means so as to generate the final signal. The logic means 18 records the byte number of the transferred data, cyclically detects the byte size signal and quickly changes the state of the final signal. Thus, the state of the blast signals is quickly changed.</p> |
