发明名称 CLOCK CONTROL SYSTEM
摘要 <p>PURPOSE:To execute the high speed and the low energy consumption by comparing a code stored in a register group and a code on the data bus of a computer system and outputting the clock signal of frequency instructed by the information. CONSTITUTION:Code comparing circuits 3A and 3B always compare the instruction code of a computer system on a system bus 7 and a code stored in code storing register groups 4A and 4B and detects the coincidence. The code comparing circuits 3A and 3B, when the coincidence of the code is detected, output the information to instruct the frequency corresponding to the code to variable frequency generating circuits 2A and 2B. Clock signals (a) and (b) which are output clocks become a necessary fundamental clock with control circuit groups 5 and 6. Since the frequency of the clock signal of the computer system is timely variable, the optimum and economical energy consumption can be realized and the high speed use and low energy consumption can be realized.</p>
申请公布号 JPH0243609(A) 申请公布日期 1990.02.14
申请号 JP19880193501 申请日期 1988.08.04
申请人 NEC CORP 发明人 FUJIZU TADASHI
分类号 G06F1/08 主分类号 G06F1/08
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