| 摘要 |
<p>PURPOSE:To stably shift a threshold voltage without deteriorating the characteristic of a memory cell by providing a control circuit which sets the potential of a word line at a low voltage at the initial stage of a write time and to boost it to a prescribed high voltage afterwards. CONSTITUTION:Since a write control signal is delayed by a prescribed time at a delay circuit 8 in a signal generation circuit 7, a NAND circuit 9 sets output at 'L' being delayed from the start-up of the write control signal. Therefore, the signal generation circuit 7 outputs the low voltage that is the one resistor-dividing resistors R1 and R2 at the initial stage of the write time, and outputs a source voltage Vpp since a MISFET Q3 is turned off in the lapse of time. By such constitution, it is possible to obtain the shift of the threshold voltage stably and sufficiently without deteriorating the characteristic of the memory cell due to snap-back in the memory cell with dispersion in erasing levels.</p> |
