| 摘要 |
PURPOSE:To prevent instable bus line and to minimize the number of latch circuits, by reducing the gm of both P and N FETs of an inverting circuit so as to latch the state of the bus line at all times. CONSTITUTION:The mutual conductance (gm) with a P-MOSFET of the 3rd inverting circuit 5 set on is decreased than the gm with both an N-MOSFET and a transfer gate 3 of the 1st inverting set on, and the gm with an N-MOSFET of the 3rd inverting circuit 5 set on is decreased than the gm with a P-MOSFET and the transfer gate 3 of the 1st inverting circuit 2 set on. Thus, the potential level of the node 8 is brought into a potential level to be discrminated as ''0'' level with the logical threshold value of the 2nd inverting circuit 4. The output level of the 2nd inverting circuit 4 is inverted, the P-MOSFET of the 3rd inverting circuit 5 is turned off, the N-MOSFET is turned on, the output level of the 4rd inverting circuit 5 is kept the same as that of the 2nd inverting circuit 2 and latched. |
