| 摘要 |
PURPOSE:To extract fault data which cannot be obtained so far by providing a supervisory bit bus consisting of a serial transmission signal line, a serial reception signal line, a CPU number selection line and a mode selection line and executing control different from that on a general-purpose bus. CONSTITUTION:CPU 1-7 are connected with a central supervisory board 8 by the general-purpose bus 10 and a supervisory bit bus 9. The supervisory bit bus 9 consists of the serial transmission data line 11, the serial reception data line 12, the CPU number selection lines 13-15 and the mode selection lines 16 and 17. Consequently, the state-sensing of CPU and the memory-dumping of CPU are attained by using the supervisory bit bus 9 even if there is the fault in the general-purpose bus 10, and the reset processing of CPU is executed according to circumstances so as to attain retrial. Thus, data is prevented from being not extracted even if the cause of the fault is in the bus. |
