| 摘要 |
PURPOSE:To erase the contents of a picture memory securely in an erasing pulse generating frame by dividing the picture memory into memory blocks to give common addresses, and specifying an address according to the combination of a block selection and an address signal. CONSTITUTION:The picture memory is divided into memory blocks 1-7, which each consists of two memory elements, i,e. 1a-7a, and 1b-7b; and an address bus AB and a data bus DB are connected to those elements 1a-7a, and 1b-7b. A decoder 10 is connected to the elements 1a-7a, and 1b-7b through AND gates 11-17 and a decoder 9 for decoding addresses A13-A15 is connected to the decoder 10. Further, an FF circuit 8 which inputs an erasing pulse from a microcomputer is connected to the decoder 10. On the basis of the combination of the block selection signal and address signal, addresses of the blocks 1-7 are specified to erase memory contents securely within the generation frame of the erasing pulse. |
