发明名称 DATA PROCESSOR
摘要 PURPOSE:To speed up the processing, by instructing the number of steps of instructions forming a loop in instructing the start of the loop. CONSTITUTION:A program counter 2, a step circuit 3, and a program counter stacker 4 stack the content of the counter 2. A number of times counter 5 is subtracted by 1 at each looping when the loop times number is set. A loop number end detection 6 outputs logical ''1'' when the content of the counter 5 is zero and the number of steps is set to a step number register 7 at the start of loop. The content of a step counter 8 is subtracted by 1 when the instructions forming the loop are read out.
申请公布号 JPS58117050(A) 申请公布日期 1983.07.12
申请号 JP19810212808 申请日期 1981.12.30
申请人 FUJITSU KK 发明人 TSUDA TOSHITAKA;SHIMADA MITSUO
分类号 G06F9/32;(IPC1-7):06F9/32 主分类号 G06F9/32
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