发明名称 HIGH-SPEED CODE CONVERTING SYSTEM
摘要 PURPOSE:To perform the conversion of codes at a high speed by converting an EBCDIC code into an ASCII code and vice versa in terms of hardware. CONSTITUTION:The 1st and 2nd operand registers 1 and 2 convert the ASCII codes into the EBCDIC codes and vice versa. An OR is calculated 3 between the outputs of both registers 1 and 2, and the output of this calculation is stored in a 3rd operand register 4. In the case the ASCII code is converted into the EBCDIC code by the third register 3, a flag is set at 1 only when the hexadecimal '30' is converted into '39'. While the flag is set at 1 only when the hexadecimal 'F0' is converted into 'F9' in the case the EBCDIC code is converted into the ASCII code. Then an address of a RAM 14 is selected by the byte of the corresponding register 2 when the flag is kept at 0. Then the code-converted outputs are stored in the register 4 for each byte.
申请公布号 JPH0233624(A) 申请公布日期 1990.02.02
申请号 JP19880182819 申请日期 1988.07.23
申请人 NEC CORP 发明人 NAGASAWA TOSHIKATSU
分类号 G06F5/00 主分类号 G06F5/00
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