| 摘要 |
PURPOSE:To decrease a leakage current due to a short channel effect and a parasitic resistance and to improve a memory device of this design in stability and a data storing property by a method wherein MOS type field effect transistors, possessed of such a structure that both ends of a gate region are controlled with a base silicon layer, are employed. CONSTITUTION:A MOSFET, possessed of such a structure that both ends of a gate region are controlled with a base silicon layer, is used. The MOSFET is provided with a base silicon layer 11 which is formed in deposition on a p-type silicon semiconductor substrate 9 and contains an n<+>-type impurity. A specified part of the base poly-silicon layer 11 is removed through a selective etching for the formation of an inter-element isolating region 12 as required, and concurrently a part 13 corresponding to a gate region is selectively removed through an etching for the formation of a thin gate oxide film 10 whose both ends are specified in dimension, then the MOSFET is subjected to a heat treatment to form a source region 8a and a drain region 8b of MOSFETs (Q3, Q4) 33 and 34 through the diffusion of impurity from the base poly-silicon layer 11 left unremoved which corresponds to a source and a drain region. |
