发明名称 MULTIPLICATION CIRCUIT FOR FLOATING POINT
摘要 PURPOSE:To avoid the occurrence of the double carry propagation by dividing the addition of partial products into a high-order part and a low-order part, performing the addition free from the carry propagation for the high-order part, and correcting the addition simultaneously with a rounding action. CONSTITUTION:The partial products are divided into the high-order and low- order parts. The low-order partial products are added together via a 1st adder 25 having the carry propagation. While the high-order partial products are added together via a 2nd adder 28 having no carry propagation. A 3rd adder 31 adds the addition results of the adder 28, the stored carry groups, the carries 26 produced from the addition of the adder 25 and sent to the high-order partial products, and a rounding bit 27 together. Thus the product of a mantissa part is produced simultaneously with a rounding action. Thus it is possible to avoid the double carry propagation for the high-order partial products. Then the mantissa part is processed at high speed for the multiplication of floating points.
申请公布号 JPH0231226(A) 申请公布日期 1990.02.01
申请号 JP19880180340 申请日期 1988.07.21
申请人 TOSHIBA CORP 发明人 SAKATA KUNIHIKO
分类号 G06F7/53;G06F7/38;G06F7/487;G06F7/506;G06F7/508;G06F7/52;G06F7/523 主分类号 G06F7/53
代理机构 代理人
主权项
地址