| 摘要 |
<p>PURPOSE:To reduce the number of executing commands and to shorten processing time by writing the data of a fixed bit involving a least significant and the data of the residual bit with straddling in plural different addresses by hardware processing. CONSTITUTION:To designate a bit positionin a first address in which the least significant bit of the data of one word is written, a fixed register value set to a bit position designating register 1 is decoded by a decoder 2, and the data of a fixed bit involving the least significant bit and the writing bit position are selected by a first selecting circuit 8 based on the output of the decoder 2 and are written from the designating bit position of the first address. In the period, the output of a second selecting circuit 19 is inhibited by a first output inhibiting circuit 28. After that, the data of the residual bit are selected by the second selecting circuit 19 based on the output of the decoder 2 and are written from the first bit of the second address, and in the period, the output of the first selecting circuit 8 is inhibited by a second output inhibiting circuit 33.</p> |
