发明名称 |
APPARATUS FOR CONTROLLING ACCESS TO A MEMORY |
摘要 |
<p>A computer system having a central processing unit, a dynamic memory controller, an error detection and correction network and a dynamic memory for storing data that are subject to being refreshed and to data bit errors. The dynamic memory controller has a refresh mode for controlling access to the memory only to refresh the data, a refresh with error detection and correction mode, for controlling access to the memory to merge or simultaneous refresh a row of data while detecting and correcting data bit errors, and a read/write mode for controlling access to the memory in response to CPU requests for a read/write memory operation.</p> |
申请公布号 |
EP0138964(B1) |
申请公布日期 |
1990.01.31 |
申请号 |
EP19840901514 |
申请日期 |
1984.03.14 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
BRCICH, JOSEPH, A.;LEVY, ROY, J.;MADEWELL, JIMMY;THREEWITT, N., BRUCE |
分类号 |
G06F12/16;G06F11/10;G11C11/34;G11C11/406;G11C29/00 |
主分类号 |
G06F12/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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