| 摘要 |
PURPOSE:To obtain the title device which can be easily manufactured in a short period by applying a mask-one-layer customizing system to an I/O cell region, by a method wherein a first layer wiring in the I/O cell region is formed as a fixed wiring on the master chip side, and a second wiring layer in the I/O cell region is formed as a variable wiring. CONSTITUTION:A master chip 103 contains a basic cell region 101 in which a plurality of basic cell rows 106 are arranged, and an I/O cell region 102 in which a plurality of I/O cells 107 are arranged along the outer peripheral part. A master slice type LSI 100 is provided with said master chip 103, and a first and a second layer wirings which are formed in the basic cell region 101 and the I/O cell region 102. In this master slice type LSI 100, the first layer wiring in the I/O cell region 102 is made a fixed wiring formed on the master chip 103 side. The second layer wiring in the I/O cell region 102 is formed as a variable wiring capable of being changed according to an I/O circuit system applied to said I/O cell region 102. For example, the above variable wiring selectively connects through-holes shown by black dots in the figure. |
