发明名称 READ ONLY MEMORY
摘要 The ROM circuit comprises a first transistor having a control and a floating gate and a depletion type second transistor having a gate formed as an extension of the floating gate. The second transistor outputs a high level control signal if hot electrons have been accumulated on the floating gate of the first transistor by the application of a predetermined high level input signal to the control gate, and outputs a low level signal when the high level input signal has not been provided to the control gate. A resistor is connected between the control gate and drain of the first transistor, and a second resistor is connected between the output node of the second transistor and the second voltage surce.
申请公布号 KR900000586(B1) 申请公布日期 1990.01.31
申请号 KR19850007906 申请日期 1985.10.25
申请人 FUJITSU CO.,LTD. 发明人 WAKIMOTO, HIDEYUKI;YOSHITA, MASANOBU
分类号 G11C17/00;G11C16/04;G11C16/06;G11C29/00;G11C29/04;H01L21/8247;H01L27/10;H01L29/788;H01L29/792;(IPC1-7):H01L27/112 主分类号 G11C17/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利