发明名称 BYTE TIMING ADAPTOR
摘要 <p>PURPOSE:To built up a DCE (opposite station line terminal equipment) equipment inexpensively and to easily supply a byte timing to the DCE by extracting either an internal or an external timing of a data fetched in an elastic store memory in the internal burst timing through a selector. CONSTITUTION:A data of a transmission data line I sent from a DCE 1 passes through a receiver 4 and is given to shift registers 6a, 6b. Upon the detection of a 'SYN' character, a synchronizing signal detection section 7 starts a counter 8. The counter 8 generates an internal byte timing 15 of the DCE 1. The data passing through the shift registers 6a, 6b is stored in elastic store memories 9a, 9b by taking the internal byte timing 15 as a trigger. On the other hand, a byte timing B sent from a DCE 2 is led to the memories 9a, 9b by using an external byte timing 16 through a selector 14. The data in the memories 9a, 9b is read by using the byte timing B as a trigger.</p>
申请公布号 JPH0230255(A) 申请公布日期 1990.01.31
申请号 JP19880180727 申请日期 1988.07.20
申请人 KOKUSAI DENSHIN DENWA CO LTD <KDD>;MITSUBISHI ELECTRIC CORP 发明人 TABATA MASAAKI;SATO KIMIYASU
分类号 H04L29/10;H04L7/00;H04L13/00 主分类号 H04L29/10
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