发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To execute an efficient test without installing more terminals for test and to enhance a defect detection rate by a method wherein signal lines of different functional parts are short-circuited and the signal lines are connected to bonding pads. CONSTITUTION:Signal lines 6 of different functional parts are short-circuited and the signal lines 6 are connected to bonding pads 2 in a semiconductor integrated circuit device which is provided with the following: an internal logic cell formed on a semiconductor chip 1; a plurality of input/output pads 2 formed in a peripheral part of the semiconductor chip 1; an input/output buffer cell used to connect said internal logic cell to the input/output pads 2. For example, a signal of a logic part 3 and a signal of a CPU 4 are short-circuited or a signal of a memory part 5 and the signal of the CPU 4 are short-circuited in such a way that an input/output signal of the logic part 3, an input/output signal of the CPU 4 and an input/output signal of the memory part 5 are all taken out; the signals are taken out at input/output pads 2. On the other hand, power-supply lines are separated for individual functional parts; the power-supply feed lines are led to different power-supply feed pads.</p>
申请公布号 JPH0230176(A) 申请公布日期 1990.01.31
申请号 JP19880181024 申请日期 1988.07.19
申请人 NEC CORP 发明人 YASUKI HIROYUKI
分类号 G01R31/28;G11C29/00;G11C29/02;G11C29/56;H01L21/60;H01L21/66;H01L21/82;H01L21/822;H01L27/04;H01L27/118 主分类号 G01R31/28
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