| 摘要 |
PURPOSE:To limit a shift number for next partial product generation by providing a device to hold a shift control output, comparing the shift numbers of a preceding time and a present time and determining the shift number. CONSTITUTION:A multiplier register 1 defines a multiplier with a code as an input and holds the shifted multiplier in arithmetic processing. A multiplier shifter 1 shifts a numerical value, which is held in the multiplier register 1, by 2 bits to right and stores it again in the multiplier register 1. An overflow bit from the multiplier shifter 2 is held with a carry flag 3. A multiplicand register 4 defines a multiplicand with a code as an input and holds a shifted partial product in the arithmetic processing. The multiplicand is shifted only by a shift number 0 bit-3 bit, which is designated by a shift number arithmetic processing unit 6, to left with a shifter 5. Then, the cumulative value of the partial product, which is held in a partial product register 7, and the output of the shifter 5 are inputted to an arithmetic unit 8. |
