发明名称 Test circuit having selective by pass arrangement for test data
摘要 The test pattern signal inputted from an input terminal is set at a corresponding circuit portion by shifting each shift register for prescribed times. Meanwhile, when a circuit portion of a certain circuit block only is to be tested, the test pattern signal from the input terminal is selected by a selected circuit and is directly applied to the shift register corresponding to that circuit block. Consequently, the test pattern signal is directly applied to the shift register corresponding to the circuit block without being passed through the shift registers on the way, so that the setting of the test pattern signal can be carried out quickly, enabling speedy testing.
申请公布号 US4897837(A) 申请公布日期 1990.01.30
申请号 US19880182867 申请日期 1988.04.13
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 ISHIHARA, KAZUYA;NAKAGAWA, SHIN-ICHI
分类号 G01R31/28;G01R31/3185 主分类号 G01R31/28
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