发明名称 MULTI-CHANNEL CONTROLLER
摘要 The invention concerns a multi-channel controller for performing the transfer of data between memory and the interfaces of microprocessor or computer systems. The controller comprises a logic circuit (25) into which multi-channel data can be fed and further including a set (20) of interconnected parallel shift registers including an input register (1) for receiving data from the logic circuit and an output register (n) the output of which is connected to said logic circuit (25). A clock (26) clocks the registers (20) so that on a first clock pulse data is entered into said input register, at a second clock pulse the data in said input register is transferred to the adjacent register in the set so that after N clock pulses the data appears at the outputs of the said output register, the logic circuit (25) being operative to perform logical operations on the data from said output register between said clock signals and to output the results of said logical operations.
申请公布号 AU3822389(A) 申请公布日期 1990.01.25
申请号 AU19890038223 申请日期 1989.07.18
申请人 GEC PLESSEY TELECOMMUNICATIONS LIMITED 发明人 JOHN ANDREW NIBLOCK;ROY ANDREW KIDGER;ALLAN MIDDLETON
分类号 H04Q3/42;G06F13/12;H04Q11/04 主分类号 H04Q3/42
代理机构 代理人
主权项
地址