发明名称 Circuit arrangement for the parallel connection of power supply devices
摘要 The circuit arrangement is intended to be used for connecting one or more power supply devices with common loads, without significant voltage drops and/or power losses taking place. For connecting power supply devices to loads, reverse-operated MOS field-effect transistors are used as transistors, the source-drain diodes of which produce decoupling in the blocked state. The control inputs of the transistors are, in each case, connected to the output of an operational amplifier which delivers a control voltage for the extremely-low ohmic switching of the corresponding transistor when it is recognised on its inputs that the voltage across the load is less than at the output of the corresponding power supply device. Lossless connection is achieved, and fast switching-off or switching-over is guaranteed in the event of a fault.
申请公布号 DE3834867(C1) 申请公布日期 1990.01.25
申请号 DE19883834867 申请日期 1988.10.13
申请人 TELENORMA TELEFONBAU UND NORMALZEIT GMBH, 6000 FRANKFURT, DE 发明人 HUELLENHAGEN, AXEL, 4050 MOENCHENGLADBACH, DE;INDEK, RAINER, DIPL.-ING., 4100 DUISBURG, DE;SIEBEN, THOMAS, DIPL.-ING., 4000 DUESSELDORF, DE
分类号 G05F1/59;H02J1/10;H04M19/00 主分类号 G05F1/59
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