发明名称 Apparatus for transmitting data between a central processor and remote peripheral devices.
摘要 <p>The present invention relates to apparatus for transmitting data between a central processor (12) and one or more remote peripheral devices (30, 32, 34) comprising one or more channels (14) connected between the processor and one or more peripheral device controllers (24, 26, 28) for controlling one or more peripheral devices (30, 32, 34) in response to signals from the channel in accordance with a predetermined communications protocol, and a serial data link adapter (17) connected between one of the channels and one or more of the peripheral device controllers for extending the range of communications between the channels and the controllers. According to the invention, the apparatus is characterised in that the serial data link adapter (17) comprises first and second sub-adapters (16, 20) each communicating with the other across the serial data link and each sub-adapter having transmit and receive sections, in that the transmit section of each of the sub-adapters comprises frame generation means (40A, 40B) responsive to signals received from the channel (14) and the peripheral device controllers respectively, the signals conforming to the predetermined protocol, the frame generation means including means for generating one or more unique start frame characters in response to control signals received by the frame generation means, means for generating predetermined idle characters, the idle characters having an error imune relationship with the start frame characters, such that idle characters having single and double bit errors transmitted on the serial data link will not be recognized as start frame characters, an encoder (50A, 50B) for encoding data for efficient and error free transmission over the data link, a serializer (60A, 60B) for converting the encoded data from parallel format to serial format, and link interface and driver means (110A, 110B) for transmitting serialized encoded data into the serial data link and in that the receive section of each of the sub-adapters comprises a receiver (80A, 80B) for receiving the encoded serialized data, a deserializer (90A, 90B) for converting the serial encoded data to parallel format, a decoder (100A, 100B) for recovering digital data in an error free form, and interface means (110A, 110B) for reconstructing data and control signals in the predetermined protocol for transmission to the one or more peripheral device controllers or to the channel.</p>
申请公布号 EP0352028(A2) 申请公布日期 1990.01.24
申请号 EP19890307143 申请日期 1989.07.14
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 FREDERICKS, KENNETH JAMES;KUBIK, JOSEPH JOHN;WIEGAND, MICHAEL ROGER;WILSON, LEE HARDY
分类号 G06F11/08;G06F13/12;G06F13/42;H04L1/00 主分类号 G06F11/08
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