发明名称 |
MASTER SLICE TYPE SEMICONDUCTOR CIRCUIT DEVICE |
摘要 |
A memory block has one memory circuit ; one conductive layer to peripheral portions of the memory circuit and used as an input portion. Power source lines are provided to the peripheral portion of the memory circuit and formed by a conductive layer different from the conductive layers at a selected input portion. The portion connected by the contact hole is set or clamped to a predetermined logic level by the power source line. This enables a change of the memory capacity or the function of the memory block to satisfy customer reguirements.
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申请公布号 |
KR900000178(B1) |
申请公布日期 |
1990.01.23 |
申请号 |
KR19850004739 |
申请日期 |
1985.07.02 |
申请人 |
FUJITSU CO.LTD. |
发明人 |
DANABE DOMOAKI;FUJI SIGERU;DAKAYAMA YOSHIHISA |
分类号 |
H01L21/822;G11C5/02;G11C11/401;H01L21/3205;H01L21/82;H01L23/52;H01L27/04;H01L27/118;(IPC1-7):H01L27/04;G11C11/34 |
主分类号 |
H01L21/822 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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