发明名称 |
High-speed dynamic domino circuit implemented with gaas mesfets |
摘要 |
A dynamic logic circuit (AND or OR) utilizes one depletion-mode metal-semiconductor FET for precharging an internal node A, and a plurality of the same type of FETs in series, or a FET in parallel with one or more of the series connected FETs for implementing the logic function. A pair of FETs are connected to provide an output inverter with two series diodes for level shift. A coupling capacitor may be employed with a further FET to provide level shifting required between the inverter and the logic circuit output terminal. These circuits may be cascaded to form a domino chain.
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申请公布号 |
US4896057(A) |
申请公布日期 |
1990.01.23 |
申请号 |
US19880244761 |
申请日期 |
1988.09.14 |
申请人 |
UNITED STATES OF AMERICA AS REPRESENTED BY THE ADMINISTRATOR, NATIONAL AERONAUTICS AND SPACE ADMINISTRATION |
发明人 |
YANG, LONG;LONG, STEPHEN I. |
分类号 |
H03K19/0952;H03K19/096 |
主分类号 |
H03K19/0952 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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