| 摘要 |
PURPOSE: To recover errors without affecting the other part of a system even when the error is generated by stopping a unit to be affected by the operation of a certain unit by conditional clocks corresponding to the detection of the erroneous operation of the unit. CONSTITUTION: When the plural modules 32 of a card 30 are connected to a card error checking and gathering(CECL) element 33, the CECL element 33 performs transmission to a card level detection/recording(CLDR) circuit 35 and the CLDR circuit 35 classifies the error as a level 1(L1), the level 2(L2) or the level 3(L3). A level classification signal L1 is sent in a forward direction through a card error communication gathering circuit (CCOM, COLL) 36, however, a signal L2 is returned to a gate clock generation circuit (CKGEN) 37 and the CKGEN circuit 37 stops the supply of clock signals to the modules. Thus, even when the error is generated, the error is recovered without affecting the other part of the system. |
