| 摘要 |
PURPOSE:To shorten the data width of a ROM to be accessed immediately after reset by allowing a CPU to compose instructions respectively consisting of 8 bits in the ROM to a 32-bit instruction immediately after reset, transfer the composed 32-bit instruction to a RAM and then execute the instruction. CONSTITUTION:The CPU 20 reads out the upper 8 bits of an address in the ROM 22 storing an instruction to be transferred from the ROM 22 as the lower 8 bits of the 32-bit data. The CPU 20 sends the 32-bit data to an ALU 1, the ALU 1 masks the upper 24 bits of the data and a shifter 2 shifts the 24 bits. The shifted data are sent to the ALU 1 again, OR operation between the lower 24 bits stored in an internal register 3 and effective data is found out and the OR result is returned to the register 3. Then, the CPU 20 composes instructions to be transferred from the address space of the ROM 22 and instructions stored by 8-bit width to an instruction with 32-bit width and transfers the composed instruction to the address space of the RAM 21 to be transferred. Then, instruction execution is started from the address of the instruction to be initially executed in the transferred RAM 21.
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