| 摘要 |
The field effect transistor with a semiconductor heterojunction includes a GaInAs(Gallum Indium Arsenide) mixed crystal layer (23) providing a current path. Low resistance InP(Indiun Phosphide) layers are ion implanted on or under the arsenide layer to obtain a reduced source resistance. Source, Gate, and Drain electrodes (6,5,7) are formed on an AlInAs(Aluminium Indium Arsenide) mixed crystal layer (24) and an ion implanted region form the reduced the source resistance between the source electrode (6) and a two dimensional electron layer (8) in the GaInAs layer.
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