| 摘要 |
PURPOSE:To set freely the aspect ratio of layout in a memory cell array by providing plural sets of 1st word lines to a memory cell of each row of the memory cell array and connecting each memory cell to only one of 1st word lines of a pair. CONSTITUTION:A memory cell 1 is arranged in 2 rows and 8 columns to constitute a memory cell array. Write word wires WW00, WW01 in pairs correspond to the 1st row and are provided to be extended in the column direction and write word wires WW10, WW11 are in pairs similarly, extended in the column direction while corresponding to the 2nd row. The write word wires WW00-WW11 are connected to an address decoder 2c receiving write address signals WA0, WA1. Then only a write wire corresponding to the 1/n memory cell goes to logical 1 in all columns in one row of the memory cell array and the data from the 1st port is written in the memory cell. Thus, one row of the memory cell array corresponds to n-word and n-column corresponds to 1 bit. |
