| 摘要 |
<p>PURPOSE:To relieve a defect in an area not in use without much increase in the chip area by providing plural information bit storage cells along with one word line and a detection bit storage cell detecting the data of a specific bit pattern. CONSTITUTION:Each information bit storage cell Mi,j is written to be high threshold voltage for logical 0 and as low threshold voltage for logical 1 and a detection bit storage cell Mi is written to be a low threshold voltage when all write information in the information bit storage cells Mi,j connected to same word line WLk or WL7 and to be a high threshold value voltage in other cases. Thus, in the case of the test, when the area not in use is subjected address designation, the information read out of each word line is decided by the information written in the detection bit storage cell and it is read that all information bit storage cell is logical 1. Thus, even if any defect bit exists in the area not in use, it is relieved without much increasing the chip area.</p> |
