发明名称 DATA PROCESSOR
摘要 <p>PURPOSE:To flexibly control the low energy consumption of a data processor in a CMOS by stopping a clock control circuit with a software and canceling the stop with interruption. CONSTITUTION:Clock signals 3a-3c are supplied through clock gates 304-306 to the processor as clock signals 3x-3z. When the micro-instruction of a clock stop request is read in the processor, a signal 3d goes to be 'H' and it is stored in flip-flops (FF) 300-302. Then, the clock outputs 3x-3z of the clock gates 304-306 are fixed to either 'H' or 'L' by output signals 3h and 3i of an FF303. When an interruption request is inputted to signals 3l-3o, the request is stored in FF310-317 and an output through a NOR gate 310 changes the condition of an FF318 and also changes the condition of the FF303 through FFs 317, 320, 321 and 302. Then, the clock gates 304-306 are opened and the clock signal is sent to the processor. The processor reads the conditions of the FF314-317 through a mask gate 324.</p>
申请公布号 JPH0214308(A) 申请公布日期 1990.01.18
申请号 JP19890016161 申请日期 1989.01.27
申请人 HITACHI LTD 发明人 MAEJIMA HIDEO;KATSURA AKIHIRO;KIHARA TOSHIMASA;AKAO YASUSHI
分类号 G06F1/04 主分类号 G06F1/04
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