SYSTEM FOR CHECKING CIRCUIT DIAGRAM DESIGNING RULE,申请号JP19880163245-传众专利搜索

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发明名称	SYSTEM FOR CHECKING CIRCUIT DIAGRAM DESIGNING RULE
摘要
申请公布号	JPH0212468(A)	申请公布日期	1990.01.17
申请号	JP19880163245	申请日期	1988.06.30
申请人	NEC CORP	发明人	KUROSAWA ATSUSHI
分类号	G06F17/50	主分类号	G06F17/50
代理机构		代理人
主权项
地址

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