| 摘要 |
PURPOSE:To prevent deterioration of an element by fixing output signals from the output circuit of a CPU core and gate circuit to specific potential. CONSTITUTION:When a debugging signal 101 is made effective without connecting a debugger erroneously, output signals 108' which become higher in impedance at the time of debugging mode (when a CPU core 2 is set to a holding state) from an output circuit and output signals (output signal 108) which are made higher in impedance by means of the 2nd gate circuit 4 of the output signals of the CPU core 2 are fixed to high levels by means of a pull-up resistance circuit 7 since they have not become higher in impedance. Therefore, no through current is made flow to a peripheral circuit and random logic circuit constituted of the CMOS element of a CPU core system LSI 1. Thus the deterioration of the element can be prevented. |
