发明名称 LAYOUT OF MULTI-STAGE CIRCUIT NETWORK
摘要 <p>PURPOSE: To remove the complicated state of connection by separating a multistage circuit network between stages, collecting auxiliary circuit networks on a substrate and providing logic control means for exchanging the connection of inputs and outputs at the input terminals and the output terminals of the respective stages of the auxiliary circuit networks. CONSTITUTION: The circuit network is separated between the stages and it is divided into the small number of types of the auxiliary circuit networks. The auxiliary circuit networks are collected on the substrate. The logic control means for exchanging the connection of the inputs and the outputs are provided at the input terminals and the output terminals of the respective stages in the auxiliary circuit networks. When the logic value of a control line is zero, a switch makes outputs B0 and B1 pass to the right. When the logic value of the control line is '1', the data outputs B0 and B1 are exchanged at the time of making data pass to the right. The control line OUT3 exchanges the output of an element in the first stage, and the controlline OUT2 exchanges the output of an element in the second stage. The control lines are connected to the connection pins of a back panel and the pins of OUT3 and OUT2 in the grooves S1, S2, S7 and S8 of a card nest are connected to the logic values '0' and '1'. Thus, the signal type of the substrate is used in common as the substrate for the grooves S1, S2, S7 and S8.</p>
申请公布号 JPH0212416(A) 申请公布日期 1990.01.17
申请号 JP19890078735 申请日期 1989.03.31
申请人 ROORARU CORP 发明人 KENISU II BATSUCHIYAA
分类号 G06F1/18;G06F17/50;H04Q1/16;H04Q3/52;H05K3/00 主分类号 G06F1/18
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