| 摘要 |
<p>PURPOSE: To prevent any useless or power consuming level transition from being promoted by suppressing a cyclic operation in a period in which any data signal to be processed is absent in an equipment. CONSTITUTION: When the final input packet of a queue FA is transmitted to a matrix MC, and then aligned queues FA0-FA15 are all made empty, a signal the inverse of FV is turned into a 0 state, and a counter CT incremented by a signal H is released. When the counter CT reaches the maximum capacity N, a time DP=N/F (F is the frequency of the signal H) is timed out with the transmission of the final packet to the matrix MC, and switching to at least one of output multiplexes S0-S15 is ended. The output the inverse of C of the counter CT is turned into a 0 state, the counter CT is released, and a gate ET1 is closed. Thus, the transition of a signal is not operated in a switcher CP so that power consumption can be extremely reduced.</p> |
