发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To integrate and to reduce power consumption of a semiconductor memory without erroneous operation due to soft error by directly adding a ground line capacity to the node of a memory cell in a node contact in a structural manner. CONSTITUTION:Word lines W and gate polycide layer G are patterned on a field insulating film 3 of a P-type silicon substrate 1, and the N-type diffusion layer 2a of a drain is then formed. Then, a thick first interlayer insulating film 4 is formed of a silicon oxide film by a vapor growing method, an opening for forming a node contact N1 is opened. Thereafter, a load resistor R1 made of a polycrystalline silicon layer of second layer is formed along the inner wall of the opening, and brought into contact with the layer 2a in the bottom. Then, a thin silicon nitride film is grown on a whole surface, and patterned to retain a thin silicon nitride film 5 in the opening 10. Subsequently, after the contact hole of the ground contact is opened, the polycrystalline silicon layer of the third layer is grown on a whole surface, so patterned as to cover the film 5, and a ground line 6 is then formed.
申请公布号 JPH0212963(A) 申请公布日期 1990.01.17
申请号 JP19880164312 申请日期 1988.06.30
申请人 NEC CORP 发明人 ITO HIROSHI
分类号 H01L27/04;H01L21/822;H01L21/8244;H01L27/10;H01L27/11 主分类号 H01L27/04
代理机构 代理人
主权项
地址