发明名称 Method and on-chip apparatus for continuity testing
摘要 A method of performing continuity testing of individual lead sets bonded to an integrated semiconductor component with a continuity test circuit fabricated on the component. The continuity test circuit includes a plurality of current gates, each of which is associated with a different semiconductor component contact pad a lead set is bonded to. Each current gate includes a first terminal connected to the associated contact pad and a second terminal connected to a common conductor all the current gate second terminals are connected to. The common conductor terminates at a semiconductor component contact test pad a lead set is bonded to. Whenever a test signal is applied to either the first or second terminal of a current gate, a measurable response signal is generated by the current gate over the other terminal. Continuity testing of the lead sets bonded to the chip is performed by applying a test signal to either a wiring board conductor connected to the lead set being tested or a wiring board conductor connected to the lead set connected to the semicondcutor component test contact pad. A test probe is then applied to the board conductor the test signal is not applied to. If the response signal is sensed, the leads are properly bonded; if no response signal is detected either the lead set being tested on the lead set connected to the semiconductor component is improperly bonded. The current gate blocks signals on the first terminal from appearing on the second terminal or the common conductor. Thus, when the semiconductor component is in use, the continuity test circuit is isolated from the other individual circuit components forming the integrated semiconductor component.
申请公布号 US4894605(A) 申请公布日期 1990.01.16
申请号 US19880159757 申请日期 1988.02.24
申请人 DIGITAL EQUIPMENT CORPORATION 发明人 RINGLEB, DIETHELM;SCHUMANN, REINHARD;STEARNS, ELSWORTH;STYLIANOS, JR., TOM;SWEENEY, JOHN
分类号 G01R31/28;G01R31/317;G01R31/3185 主分类号 G01R31/28
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