发明名称 INTEGRATED CIRCUIT HAVING SELETIVELY ARRANGEABLE PINS AS OUTPUT TERMINAL OR INPUT TERMINAL
摘要 <p>PURPOSE: To enable a pin to operate as an input or output terminal synchronously with a software or non-synchronously with a hardware by providing with a buffer means for selectively composing the pin. CONSTITUTION: The output of the buffer 26 is connected to the pin 28 serving as the input or output terminal of an integrated circuit housing a sequence and its relating element. The condition of three states that the buffer 26 enables the pin 28 to use as the input terminal is unconditionally brought about with the content of a composing resistor 25. That is, one is for the synchronous software control of the pin 28, one is for the asynchronous hardware of the pin 28 and another one is for the continuous control of the pin 28. By this way, the pin is allowed to be synchronous as the output terminal with the execution of an instruction by the sequence, allowed to be non-synchronous as the output terminal with the application of signals in another pin of the integrated circuit, or allowed to be continuous as the input with the content of the resistor.</p>
申请公布号 JPH0210592(A) 申请公布日期 1990.01.16
申请号 JP19890042899 申请日期 1989.02.22
申请人 ADVANCED MICRO DEVICDS INC 发明人 FUIRITSUPU FURAIDEIN
分类号 G11C11/401;G06F1/22;H03K5/02;H03K19/0175 主分类号 G11C11/401
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