发明名称 MEMORY DEVICE
摘要 <p>PURPOSE: To program a flash memory device via a data port and to enable an erasing command port architecture by incorporating a circuit means into the same semiconductor chip as a memory executing erasing, programing and erasing/programming test in a circuit. CONSTITUTION: A data bus 20 is connected to an input/output buffer 21, and data to be inputted into a memory array 11 is connected from the bus 23a via a data latch 22. On the contrary, data to be outputted to the data bas 20 from the memory array 11 are connected to an I/O buffer 21 from a bus 23b via a sense circuit 101, thereafter data are outputted to the data 20. Input data are also connected to a command port controller 30 via the bus 23a. External signals WE and CE are further received with the command port controller 30, and control signals are fed to an address latch 13, the data latch 22, an eraser voltage generator 24, a program voltage generator 25 and an erasing/ programming test generator 26. External signals CE and DE are connected to a chip/output enable logic circuit 27.</p>
申请公布号 JPH0210598(A) 申请公布日期 1990.01.16
申请号 JP19890036395 申请日期 1989.02.17
申请人 INTEL CORP 发明人 JIERII EI KURAIFUERUSU;ARAN BEEKAA;JIYOOJI HEKUSUTORA;BUAAJIRU NAIRUSU KINETSUTO;SUTEIIBUN UERUZU;MAAKU UINSUTON
分类号 G11C17/00;G11C16/02;G11C16/06;G11C16/16;G11C16/32;G11C29/00;G11C29/14 主分类号 G11C17/00
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