| 摘要 |
The invention describes an improved read amplifier drive intended for reading and for resetting data in memory cells, in which drive pull-up means consisting of at least one p-channel MOS transistor (Tg; Ti, Tj) are provided respectively in order to force up the gate voltage of at least one of each of the retardable p-channel MOS transistors (Tg; Ta-Tc) within the first inverter IV10 of the read clock signal drive 10 and of the second inverter IV40 of the reset clock signal drive 20 during the transient periods of decrease of the read Qs and reset Qsd clock signals, the result being that the formation of a current path CC between the supply line and the earth line in any one of the retardable p-channel MOS transistors is prevented, this making it possible to avoid fruitless dissipation of power. Moreover, retarding resistors R3; R1, R2 are installed respectively in the first inverter of the read clock signal drive 10 and in the second inverter of the reset clock signal drive 20 so as to render the leading edges of the read and reset clock signals less steep, thus making it possible to exclude the production of noise. <IMAGE>
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