Method and circuit arrangement for producing a phase-shifted clock signal

摘要

A method for producing a clock signal, which is shifted by any desired adjustable phase value between 0 and - pi , using two conventional phase shifters which are continuously adjustable between 0 and - pi /2, of which the two inputs of the first are fed with the non-delayed signal at half the frequency, phase-shifted by - pi /2, and the two inputs of the second are fed with the signal at half the frequency, phase-shifted by - pi /2 or - pi , the two phase shifters being driven jointly, and the frequency of the output signals which are phase-shifted in this way subsequently being doubled again. The object is to provide such an adjustable clock for a relatively large frequency range, with relatively little additional cost. Since a transimpedance stage is always inserted between the output of the phase shifter and its load resistors (Figure 6), the frequency variation width is considerably increased, for example to 1 : 10. One field of application is, for example, electrical regenerators in optical conductor systems. <IMAGE>